1. Field of the Invention
The present invention relates to a current mode switching regulator that controls an output voltage on the basis of the detected values of the output voltage and an output current by the aid of a DC input power supply, and an adder used for the switching regulator.
2. Description of the Related Art
A circuit structured as shown in FIG. 6 is used for a current mode step-down switching regulator (for example, refer to JP 2002-281742 A).
In the circuit, when a switch 107 is turned on, a current flows into a coil 108 from a power supply with the result that an input voltage Vi is accumulated in the coil 108 as an electric energy (that is, electric charges), and also accumulated in an output capacitor 112. Also, when the switch 107 is turned off, the electric energy that has been accumulated in the output capacitor 112 is discharged through a load.
Accordingly, in the current mode step-down switching regulator shown in FIG. 6, a voltage obtained by averaging (integrating) the electric energy that has been accumulated in the coil 108 by the output capacitor 112 is applied to the load.
An error amplifier 101 inputs a detection voltage obtained by dividing the output voltage by the aid of a resistor 110 and a resistor 111 at an inverting input terminal thereof, inputs a reference voltage Vref that has been output from a reference voltage source 100 at a non-inverting input terminal thereof, amplifies a difference between the detection voltage and the reference voltage Vref, and outputs the amplified result to the inverting input terminal of a comparator 105 as a detected amplification voltage.
An I/V circuit 121 detects a current that flows in the coil 108, generates a voltage corresponding to the detected current, and outputs the generated voltage to one input terminal of an adder 103.
An I/V circuit 122 detects a current that flows in the load, generates a voltage corresponding to the detected current, and outputs the generated voltage to another input terminal of the adder 103.
The adder 103 adds the voltages that are input from one input terminal and another input terminal together, and outputs the added result to the non-inverting input terminal of the comparator 105 as a compensation voltage.
That is, the compensation voltage is obtained by detecting currents that flow in the respective elements by the aid of a detector that is connected in series with the load or the coil 108, converting values proportional to the current values of the currents in the load or the coil 108 into voltage values, and adding those voltage values together by the adder 103.
The comparator 105 inputs the detected amplification voltage at an inverting input terminal thereof, inputs the compensation voltage at the non-inverting input terminal, compares the detected amplification voltage with the compensation voltage, and outputs the comparison result to a reset terminal R of an SR-latch 106 as a control signal. For that reason, the detected amplification voltage that is output by the error amplifier 101 increases more as the output voltage increases more. In the case where the detected amplification voltage exceeds the compensation voltage, the comparator 105 changes the control signal from H level to L level. On the other hand, in the case where the detected amplification voltage is lower than the compensation voltage, the comparator 105 changes the control signal from L level to H level.
Accordingly, when the SR-latch 106 inputs a clock signal of a given period to a set terminal thereof from an oscillator 104, and the SR-latch 106 changes the switch signal to H level when the SR-latch 106 is set. When the SR-latch 106 inputs a control signal of H level, the SR-latch 106 resets the output, and changes the switch signal to L level. The switch 107 is turned on when the input switch signal is H level, and turned off when the input switch signal is L level.
As described above, the current mode step-down switching regulator controls the duty of the switch signal which controls the on/off state of the switch 107 because the switching regulator generates the output voltage according to feedback information on both of the output voltage and the output current.
However, in the conventional example, in the case where the adder 103 and a slope compensation circuit 102 that generates a compensation lamp wave that is input to the adder 103 are formed of CMOS, the gains of the amplifiers in the respective circuits vary due to a variation in a threshold voltage, and the compensation lamp wave and the characteristic of the adder 102 are different in each of the chips, and the characteristics of the switching regulator are different from the designed values.
For that reason, in the conventional art, the variation in the gain as described above is suppressed, and a current corresponding to the voltage of the compensation lamp wave and a sense voltage corresponding to a current that flows in the coil 108 are added together, and a slope compensated sense voltage is generated. Therefore, the adder 103 is formed of a bipolar transistor or a bi CMOS transistor (a mixture of the bipolar transistor and the CMOS transistor) shown in FIG. 7 (JP 2002-281742 A).
However, in the case where the respective circuits including the adder 103 are formed of the bipolar transistor or the bi CMOS transistor, there is a disadvantage in that a manufacturing process gets complicated as compared with the CMOS, and miniaturization cannot be conducted with the result that the chip size cannot be reduced.